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Parallel Architectures

Parallel Architectures is activity of the PARALLEL TEMPUS project.

Available kind of materials:

Overview

  1. [Document(ps.gz)][Transparencies(ps.gz)] Introduction MIMD architectures
    Document (12 pages Gzipped Postscript 37k) by Péter Kacsuk
    Transparencies (9 slides Gzipped Postscript 22k, Zipped Winword 20k) by Zsolt Németh
    Abstract (HTML)
    1. Architectural concepts
    2. Problems of scalable computers
    3. Main design issues of scalable MIMD computers
  2. [Document(ps.gz)] [Transparencies(ps.gz)] Introduction to IFP architectures by Péter Broczkó
    Document (21 pages Gzippped Postscript 83k)
    Transparencies (27 slides Gzipped Postscript 60k, Zipped WinWord 62k)
    Abstract (HTML)
    1. Overview of IFP processors
    2. Constraints on parallel instruction execution
    3. The speed-up potential of functional parallelism
  3. [Document(ps.gz)] [Document(ps.gz)] [Document(ps.gz)] [Transparencies(doc.zip)] Superscalar architectures by Dezsô Sima
    Document (Part I. of the document, 27 pages Gzipped Postscript 83k, Zipped WinWord 74k)
    (Part II. of the document, 43 pages Gzipped Postscript 122k, Zipped WinWord 121k)
    (Part III. of the document, 56 pages Gzipped Postscript 172k, Zipped WinWord 134k)
    Transparencies (Zipped Winword 258k)
    1. Introduction
    2. Parallel decoding
    3. Superscalar instruction issue
    4. Shelving
    5. Register renaming
    6. Parallel execution
    7. Preserving the sequential consistency of instruction execution
    8. Preserving the sequential consistency of exception processing
    9. Implementation of superscalar CISC-processors using a superscalar RISC core
    10. Case studies of superscalar processors
  4. [Document(ps.gz)][Transparencies(ps.gz)] Multi-threaded architectures
    Document (40 pages Gzipped Postscript 117k) by Péter Kacsuk
    Transparencies (38 slides Gzipped Postscript 115k, Zipped Winword) by Zsolt Németh
    Abstract (HTML)
    1. Introduction
    2. Computational models
    3. Neumann based multi-threaded architectures
    4. Dataflow architectures
    5. Summary
  5. [Document(ps.gz)] [Transparencies(doc.zip)] [Transparencies(doc.zip)] [Transparencies(doc.zip)] Shared memory architectures
    Document (105 pages Gzipped Postscript 333k) by Péter Kacsuk
    Transparencies (72 slides Zipped Winword 22k, Zipped Winword 129k, Zipped Winword 70k) by Etelka Kovács
    1. Introduction
    2. Dynamic interconnection networks
    3. Cache coherence
    4. Synchronization and event ordering in multiprocessors
    5. Uniform Memory Access (UMA) Machines
    6. Non-Uniform Memory Access (NUMA) Machines
    7. Cache-Coherent Non-Uniform Memory Access (CC-NUMA) Machines
    8. Cache-Only Memory Architectures (COMA) Machines
    9. Summary
  6. [Document(ps.gz)] [Transparencies(ps.gz)] Distributed memory architectures
    Document (70 pages Gzipped Postscript 208k) by Péter Kacsuk
    Transparencies (72 slides Gzipped Postscript 184k, Zipped Winword 382k) by Gyula Fehér
    1. Introduction
    2. Direct interconnection networks
    3. Fine-grain systems
    4. Medium-grain systems
    5. Coarse-grain multicomputers
    6. Summary
  7. Case examples:
  • Literature

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